The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device that uses excimer laser radiation to anneal borophosphosilicate glass (BPSG) to prevent or at least minimize boron from out-diffusing away from the BPSG layer to adjacent structures.
As is well known in the art, when manufacturing a semiconductor device, it is essential to form an insulation layer to fill the gaps between conductive patterns. As an example, in the conventional art, a BPSG layer is often used to fill in the gaps between gates.
A conventional method for manufacturing a semiconductor device, which adopts a BPSG layer as an interlayer dielectric, will be briefly described below.
After forming an isolation structure in a semiconductor substrate to delimit active regions, a plurality of gates are formed in the active regions of the semiconductor substrate. The gates have the stack structure comprising a gate insulation layer, a gate conductive layer and a gate hard mask layer.
Spacers are formed on both sidewalls of the gates, and junction areas are formed in the surface of the semiconductor substrate on both sides adjacent to the gates. A BGSG layer is formed as an interlayer dielectric on the resultant semiconductor substrate to cover the gates including the spacers and to cover the junction areas. The semiconductor substrate formed with the BPSG layer is then annealed. The annealing process is conducted in a furnace, for example, at a temperature of 820° C. for 4 hours.
By etching the BPSG layer having undergone the annealing process, contact holes for landing plugs are defined that simultaneously expose the plurality of gates and the junction areas between the gates. After forming a conductive layer for landing plugs to fill in the contact holes for landing plugs, by planarizing the conductive layer for landing plugs to expose the BPSG layer, landing plugs are formed.
However, in the conventional art as described above, the annealing process for the BPSG layer should be conducted for about 4 hours. While conducting this heating annealing process boron from the BPSG layer is likely to diffuse away from the BPSG and into adjacent outside structures. As a result, the boron that does diffuse away into adjacent outside structures, such as into the gates, the resulting electrical performance characteristics of transistors are likely to be degraded.
It is known that the diffusion of the boron can be prevented or at least minimized to some extent by forming a nitride layer for spacers on the semiconductor substrate including the gates before forming the BPSG interlayer. Nevertheless, even in this case of using nitride spacers, when annealing the insulation layer, some of the nitride spacers may be oxidated and/or lost. As a result of using nitride spacers boron can still infiltrate into the gates and therefore compromise the performance of the resulting transistor.
Further, increasing the thickness of the nitride spacers formed on both sidewalls of the gates to prevent the diffusion of the is boron has been proposed in the art. Unfortunately, since the gap between the gates gradually decreases as the high integration of semiconductor devices increases, then voids in the insulation layer are more likely to occur between the gates because to the spacers have increased in thickness. Therefore, it is substantially difficult to actually adopt this fabrication strategy of increasing the thickness of the spacers.